Instruction Format In Computer Architecture

Instruction Format in Computer Architecture :- Each instruction of CPU contain specific information field which are required to execute it this information field of instruction are called elements of instruction these are:-

1). Operation Code:- The Operation Code Fielded in the instructions Specifies the operation to be performed. The operation is specified by binary code hence the name operation code or opcode.

2). Source Operand Address:- The source operand may be in the CPU register or in the memory. Many times the instruction specified the address of the source operand so that operands can be accessed and operated by the CPU according to the instruction.

3). Destination Operand Address:- The operation executed by the CPU may produce result. Most of the time result in stored in one of the operand. Such operand is known as destination operand.

Next Instruction Address

The next instruction Address tells the CPU form where to fetch the next instruction after completion of execution of current instruction.

Types of Instruction Format

Three Address Instruction Format
Two Address Instruction Format
One Address Instruction Format
Zero Address Instruction Format

3). Three Address Instruction Format

The the address instruction can be represented Symbolically as ADD , A,B,C where A,B,C are the variable in this instructions operands B and C are called Source Operands and operand A is called destination operand and ADD is the operation to be performed on the operand.

The general instruction format for three address instruction is Opcode destination source1 and source2 the number of bits required to represent Such instruction includes as :-

1). Bit required to specify that three memory address of the tree operands if N-Bits are required to specify one memory address 3 and it required to specify operate and address.

2). Bit required to specify the operation.

for example:-

Expression: X = (A+B)*(C+D)
R1, R2 are registers
M[] is any memory location

ADD	R1, A, B	R1 = M[A] + M[B]
ADD	R2, C, D	R2 = M[C] + M[D]
MUL	X, R1, R2	M[X] = R1 * R2

2). Two Address Instruction Format

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In a computer, an instruction is a command that tells the processor to perform a specific task. The instruction format refers to the way in which the instruction is encoded and stored in the computer’s memory. The two-address instruction format is a type of instruction format that uses two memory locations, or addresses, to specify the operands (inputs) for an operation and the destination (output) of the result.

Here is an example of a two-address instruction in assembly language:

ADD R1, R2, R3

This instruction tells the processor to add the contents of registers R2 and R3, and store the result in register R1. The registers R2 and R3 are the operands, and R1 is the destination.

In this instruction format, the operation (ADD) and the operands (R2 and R3) are specified in the instruction, and the destination (R1) is specified by the first address. The second address is used to specify the second operand.

Two-address instructions are commonly used in computer architectures that have a limited number of registers, such as stack-based architectures. They are also used in some reduced instruction set computers (RISCs) and complex instruction set computers (CISCs).

Here destination address can also contain operand. for example :-

Expression: X = (A+B)*(C+D)
R1, R2 are registers
M[] is any memory location

MOV	R1, A	R1 = M[A]
ADD	R1, B	R1 = R1 + M[B]
MOV	R2, C	R2 = C
ADD	R2, D	R2 = R2 + D
MUL	R1, R2	R1 = R1 * R2
MOV	X, R1	M[X] = R1

1). One Address Instruction Format

The one-address instruction format is a type of instruction format that uses a single memory location, or address, to specify the operand(s) for an operation and the destination of the result.

In this instruction format, the operation and the destination are specified in the instruction, and the operand(s) are specified by the address. The destination and the operand(s) can be the same memory location, in which case the instruction performs an in-place operation.

Here is an example of a one-address instruction in assembly language

ADD R1, R2

This instruction tells the processor to add the contents of register R2 to the contents of register R1, and store the result back in register R1. The register R2 is the operand, and R1 is both the operand and the destination. This instruction performs an in-place operation on register R1.

One-address instructions are commonly used in computer architectures that have a limited number of registers, such as stack-based architectures. They are also used in some reduced instruction set computers (RISCs) and complex instruction set computers (CISCs).

for examples:-

Expression: X = (A+B)*(C+D)
AC is accumulator
M[] is any memory location
M[T] is temporary location

LOAD	A	AC = M[A]
ADD	B	AC = AC + M[B]
STORE	T	M[T] = AC
LOAD	C	AC = M[C]
ADD	D	AC = AC + M[D]
MUL	T	AC = AC * M[T]
STORE	X	M[X] = AC

0). Zero Address Instruction Format

The zero-address instruction format is a type of instruction format that does not use any explicit operand addresses. Instead, the operands are implicitly specified by the current state of the processor, such as the values in the registers or the top elements of a stack.

In this instruction format, the operation and the destination are specified in the instruction, but the operands are not explicitly mentioned. The processor determines the operands based on the current state of the machine.

Here is an example of a zero-address instruction in assembly language:

ADD

This instruction tells the processor to add the two top elements of the stack, and store the result back on the stack. The operands are not explicitly specified in the instruction, but are taken from the top of the stack. The result is also stored back on the stack, so no explicit destination is needed.

Zero-address instructions are commonly used in stack-based architectures, where the stack is used to store both operands and the result of an operation. They are also used in some reduced instruction set computers (RISCs) and complex instruction set computers (CISCs).